IEEE - CAS Bangalore Chapter, India     CAS Chapter - Region 10
Institute of Electrical and Electronics Engineers - Circuits and Systems Society
Goals: To conduct seminars, workshops, and other events pertaining to all aspects of electronic circuits and systems

Events - 2008
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November
Driving Energy Efficiency in India
PragaTI (TI India University), IEEE Circuits and Systems Society ( Bangalore Chapter) and the IEEE Power & Energy Society, Bangalore Chapter jointly announce a Technical Seminar and Discussion
Speaker: Ajay Mathur, Director General Bureau of Energy Efficiency
Date: Nov 21, 2008 (Friday)
Time: 2.00 pm to 3.00 pm
Venue: TR-2, Texas Instruments India Bangalore Campus, Bagmane Tech Park, CV Raman Nagar, Bangalore
The event is open to everyone. If you are coming from an organization other than TI, please intimate us in advance and arrive at least 15 minutes prior to the event to clear security and be escorted to the venue. RSVP to secretary @ ieee-cas-bangalore.org

IEEE CAS DLP talk - CAS Chapter Bangalore
IEEE circuits and Systems Society Chapter at Bangalore cordially invites you to a distinguished lecture under the DLP by
Speaker: Dr. Hubert Harrer, IBM Deutschland Research & Development GmbH, Stuttgart, RB 243294
Topic: System packaging and technologies of IBM´s latest system z high end servers
Date: 4th November 2008
Time: 11.00AM
Venue: CEDT Conference Hall, I.I.Sc, Bangalore

Abstract: The presentation compares the system packaging and technologies of IBM´s latest system z high end servers. Starting from the z900, the system design change towards a blade-like architecture will be explained. The latest system generation z10 has achieved a doubling of the multiprocessor performance compared to the z9 system by maximizing its CPU configuration in combination with increasing the speed of the interconnections. The heart of a processor node consists always of a multi chip module (MCM) which contains the double core processor chip, the cache chips and the bus adaptors to the memory and the IO chips. This MCM technology is the key for the high bandwidths between processor chips and the cache chips. The glass ceramic module has accomplished this challenge within the 102 layers resulting in a total wiring length of 545m. The increase of bandwidth requirements for the packaging will be compared for the last generations. Also the complex board and card technology of the second level packaging will be discussed.
The cooling of the system is being done with a modular refrigeration unit (MRU), which cools the processor chips down to 45-55C. This low temperature ensures highest reliability and reduced leakage current of the chips. An air cooled backup mode at a lower frequency ensures that the system does not go down in case of an MRU fail. The MCM has been designed for a maximum power of 1650W.
The presentation will focus on the electrical design methodologies for high end servers like power delivery concepts, signal integrity methodologies and power integrity designs for delivering such high currents.

About the speaker: Dr. Harrer is a Senior Technical Staff Member (STSM) since 2002 working in the IBM Server and Technology Group. He received his Dipl.-Ing. degree in 1989 and his Ph.D. degree in 1992 from the Technical University of Munich. In 1993 he received a DFG research grant to work at the University of California at Berkeley in the paradigm of Cellular Neural Networks. Since 1994 he has worked for IBM in the Boeblingen Packaging Department. In 1999 he was on international assignment at IBM Poughkeepsie, New York. He was leading the z900 MCM designs and is the technical lead for z-series CEC packaging designs since 2001. This includes the system z990, z9 and system z10 mainframe computers. His technical interests focus on packaging technology, high frequency designs and electrical analysis for first and second level packaging. He has published multiple papers and holds 7 patents in the area of packaging.


June
Lo3: Low-power, Low-cost, Local Voice and Messaging for Rural Regions
PragaTI (TI India Technical University) and IEEE Circuits and Systems Society Bangalore Chapter jointly announce a seminar
Speaker: Prof. Bhaskaran Raman, IIT Bombay
Date: 26th June, 2008 (Thursday)
Time: 3.00 pm – 4.00 pm
Venue: F-1, TI Bangalore Office
Everyone is welcome to attend! Please RSVP to ravikumar at ti.com, and arrive at least 15 minutes prior to the seminar to go through security formalities.

Abstract: Two metrics of prime importance in system design for rural deployment are: system cost and power consumption. In this work, we propose a novel approach for building a local communication system, within a village. Our approach is based on the use of IEEE 802.15.4 as the underlying technology. Although designed for a completely different application space, and although the radio capacity is small, we argue that 802.15.4 is ideally suited to minimize cost as well as power consumption. It is possible to enable a whole suite of useful applications based on voice as well as text. The use of the radio in this non-traditional setting brings up several technical challenges however. This talk articulates the motivation behind this system, and the various research challenges as well.

About the speaker: Bhaskaran Raman received his B.Tech in Computer Science and Engineering from Indian Institute of Technology, Madras in May 1997. He received his M.S. and Ph.D. in Computer Science from University of California, Berkeley, in 1999 and 2002 respectively. He was a faculty in the CSE department at Indian Institute of Technology, Kanpur (India) from June 2003. Since July 2007, he is a faculty at the CSE department at Indian Institute of Technology, Bombay (India). His research interests and expertise are in communication networks, wireless/mobile networks, large-scale Internet-based systems, and Internet middleware services. His current focus and specific interest is in appropriate technology in the domain of communication and computing for rural use.


Bluetooth & WLAN Solution Architectures
IEEE Circuits and Systems Society Bangalore Chapter, in association with PragaTI (TI India Technical University) announces a seminar
Speaker: Bhartendu Sinha, Texas Instruments
Date: 24th Jun 2008
Time: 10:00AM - 11:30AM
Venue: TR-1, Texas Instruments India, Bagmane Tech Park, CV Raman Nagar, Bengaluru, 560093
Those who wish to attend should RSVP to asrini@ti.com before June 17, 2008 and arrive at least 10 minutes before the seminar begins.

Abstract: Wireless technologies are increasingly become pervasive. Designs from ‘non-wireless’ industries typically do not have adequate wireless technology expertise. Yet these designers are seeing their firms request them to incorporate wireless interfaces in their current and future products. This results in multiple technical challenges for such designers – which they often become aware of too late, i.e. after a new product initiative fails to deliver. This presentation provides guidelines on how to choose solution architectures for two of the most prevalent consumer wireless technologies today – Bluetooth and WLAN. It also advises designers on how to choose wireless technologies and how to leverage appropriate partner networks for the design and manufacture of products with wireless interfaces.

Objectives: To expose designers to the key selection parameters, industry available solutions, and design success factors for incorporating Bluetooth / WLAN into products designs.

Target Audience: Software, hardware and system designers, who are using or planning to use either Bluetooth or WLAN in their product designs.


April
Medical Electronics Solutions – Exciting Opportunities for Collaborative Research
PragaTI (TI India Technical University ) and IEEE Circuits and Systems Society Bangalore Chapter, and IEEE EMBs Bangalore Chapter jointly present a seminar
Speaker: Shekar Rao, Worldwide Manager, Medical Electronics Solutions, Texas Instruments, Dallas
Date: Apr 21, 2008 (Monday)
Time: 3.00 PM – 5.00 PM
Venue: TR-1, Texas Instruments India , Bagmane Tech Park , CV Raman Nagar
The talk is open to everyone. If you are not from TI, please RSVP to srihari@ti.com and arrive at least 15 minutes earlier.

Abstract: Medical Electronics and Telehealth are both fast growing markets, both in India and world-wide. Technologies such as sensors, digital signal processing, ultra low-power solutions, system-on-chip integration, and wireless sensor networks, will be a key player in this market. Collaboration among companies and universities will be required for making rapid progress in these exciting areas. Shekar Rao will present a summary of some of the exciting projects that are taking place in Universities worldwide and hint at how collaborative research can be carried out in India .

About the speaker: Shekar Rao leads the worldwide strategy for medical electronics and healthcare solutions at Texas Instruments in Dallas , Texas . He possesses over 30 years of worldwide experience in product development, P&L, operations, business strategy, marketing, sales, and consulting within start-up as well as established companies such Texas Instruments, NEC Electronics and LSI Logic. He has a track record in developing and implementing multi-product and multi-market business strategies. Mr. Rao is highly knowledgeable regarding anti-trust issues, intellectual property protection, patents and the promotion of industry-wide interoperability standards and collaborations. He has a deep understanding of issues and opportunities in industries as diverse as semiconductor, life sciences, healthcare, networking hardware, software, IT, knowledge management and workflow automation. Shekar is the Chair IEEE Engineering in Medicine and Biology Society Dallas Chapter.


Semiconductor Roadmaps – How did we get here and where do we go now?
IEEE Circuits and Systems Society Bangalore Chapter announces a seminar
Speaker: Larry Sumney, CEO, Semiconductor Research Corporation
Date: April 15, 2008 (Tuesday)
Time: 11.00 AM – 12.00 Noon
Venue: CEDT Auditorium, Indian Institute of Science, Bangalore
Please RSVP to C.P. Ravikumar (ravikumar @ ti. com)

Abstract: The National Technology Roadmap for Semiconductors and the International Technology Roadmap for Semiconductors together define the general characteristics of semiconductor technology progression for the next 15 years. In this talk, we the applicability of roadmapping to other industries. After a brief historical perspective on the evolution of the roadmaps, the talk will dwell on the conditions that led to the success of the roadmapping technique in the semiconductor area. First, roadmaps must be developed through a consensus of the industry to which they apply, and individual companies must be willing and able to share their knowledge of the technology needs. The participating companies must provide, on a continuing basis, the time and talents of employees in advising, reviewing, and critiquing the technology efforts, and in maintaining the roadmap. It is equally important to look at the technological needs of university research laboratories and independent research institutes. Governments must participate and encourage the cooperative roadmap activity. The talk is intended for participants from industrial bodies, universities, and governmental organizations.

About the speaker: Larry W. Sumney is President and Chief Executive Officer of the Semiconductor Research Corporation (SRC). The SRC executes a cooperative research effort in North American universities that is supported by leading global integrated circuit manufacturers and suppliers. He received his B.A. from Washington and Jefferson College in 1962 with honors in Physics, his Master's in Engineering Administration (MEA) from George Washington University (GWU) in 1969 and completed his course work toward the DSc degree in Systems Engineering and Mathematics, also at GWU. Mr. Sumney began his career as a research physicist at the Naval Research Laboratory in 1962, later serving as Research Director of the Naval Electronics Systems Command where he defined broad basic research initiatives to support advanced systems needs of the Command. Following that assignment, Mr. Sumney was named, by the Office of the Undersecretary of Defense, the Director of the Tri Service Charge Coupled Device (CCD) Technology Development Program. He next became a member of the Office of the Undersecretary of Defense and Engineering where he had overall responsibility for the creation, implementation and management of the Very High Speed Integrated Circuits (VHSIC) Program, the largest technology development program in the Department of Defense.

Mr. Sumney currently serves on the EECS department advisory boards of the University of California , Berkeley and the University of Illinois . He is Chairman of the SIA University Research Award Selection Committee. He is a participant in the SIA’s Focus Center Research Program Governing Council and a member of the CREOL External Advisory Board, University of Central Florida . He is Chairman, Microelectronics Advanced Research Corporation (MARCO) Board of Directors. He has served on the Deans Engineering Advisory Council for the North Carolina State University , the President's Advisory Council for Clemson University , and the Director's Advisory Board of the National Security Agency. He was a member of the 1994-1995 Council on Competitiveness Reinventing R & D Committee and chaired its study group on Intellectual Property. He was a founding member and past Chairman of the Council of Consortia CEO's, a group of leading consortia heads that address best practices in order to improve the effectiveness of consortia. He is an ex-officio member of the Board of Directors for SEMATECH and the Semiconductor Industry Association (SIA).

He also is a participant in the SIA’s Technology Strategy Committee. He is a Fellow of the Institute of Electrical and Electronics Engineers(IEEE) , has served on various IEEE award committees and on IEEE Spectrum's Editorial Board. He currently serves as a member of the IEEE Robert N. Noyce Medal Committee and the 2001 and 2002 IEEE Frederick Phillips Award Committee. He is a Fellow of the American Association for the Advancement of Science (AAAS), a member of the New York Academy of Sciences and is a University-Industry Forum Member (as a University Partner) of the National Academies (NAS, NAE, NIH) Government, University, Industry Research Roundtable (GUIRR). He is also a member of the WMRC Technical Advisory Panel.


March
Adaptive Signal Processing & its Applications to Active Noise Cancellation
PragaTI (TI India Technical University ) and IEEE Circuits and Systems Society Bangalore Chapter jointly announce a seminar
Speaker: Dr S.V. Narasimhan, NAL, Bangalore
Date: March 20, 2008
Time: 1.30 PM – 4.00 PM
Venue: TI Bangalore, Bagmane Tech Park , CV Raman Nagar
Please RSVP – ravikumar@ti. com, and arrive at the reception at 1.15 pm

Basics:

  • Stationary processes & models
  • Characterization of noise/signal
  • General frame-work of noise cancellation schemes
  • Adaptive filtering theory & Signal detection techniques
    • Wiener Filters
    • LMS adaptive filters and its variants
    • Least-Square algorithms and its variants
    • Frequency domain adaptive filters etc.

    Advance topics:

  • Adaptive nonlinear filtering
  • Blind De-convolution algorithm
  • Back-propagation learning
  • Kalman filtering
  • Applications:

  • Active noise control (ANC)
  • Acoustic Echo Cancellation algorithms
  • Speech enhancement methods
  • Image/Video preprocessing/ post-processing algorithms

  • Introduction to Nano Technology and Its applications
    PragaTI (TI India Technical University) and IEEE CAS Bangalore Chapter announce a seminar
    Speaker: Dr. Mini P.Balakrishnan, HOD (Physics), Providence Women’s College, Calicut
    Date: 17 March, 2008
    Time: 11:00AM- 12:30PM
    Venue: TI Bangalore Auditorium
    Please RSVP to ravikumar@ti.com

    Abstract: This talk will cover an introduction to Nano technology, history and major milestones in the development of Nano technology and touch upon some of the applications like Medical, Solar cells etc.

    About the speaker: Dr Thomas is the present HOD of Physics in Providence Women’s College, Calicut . She is the member of the board of studies for Industrial Physics, University of Calicut . She has 25 years of academic experience with Providence Women’s College, is actively involved in the activities of the college and have paid special attention o the intellectual and moral development of the students. Actively involved with activities of the non-linear research group of Calicut University . She has delivered talks in areas of Fractal Geometry, Nonlinear Systems, Stability Analysis of NLD, Smart Materials and Nanotechnology.

    Residue Number Systems-Review of Recent work

    IEEE CAS Bangalore Chapter announces a seminar
    Speaker: P.V. Ananda Mohan, Executive Director, ECIL, Bangalore
    Date: March 6, 2008
    Time: 3.00 – 4.30 PM
    Venue: TI Bangalore Auditorium
    Please RSVP to ravikumar@ti.com and arrive at TI reception by 2.45 pm to be escorted to the room.

    Abstract: The advantages of RNS over conventional number systems is that several smaller word length processors can be used to work in parallel to realize signal processing operations as against processing using a single large word length processor. The problem, however, with RNS  based DSP is that there is a need for front end conversion from conventional number to residue form and vice versa. Moreover, the operations such as sign detection, comparison and scaling are more involved in RNS. As such, research has been on the choice of powers of two related moduli sets  where moduli are of the form 2x or 2x±1.   Several three, four and five moduli sets have been investigated. In this lecture we address the topics of Binary to RNS conversion, RNS to Binary conversion for these specific moduli sets, Area-time trade-offs, modulo adders, modulo multipliers. Some new theorems such s ART are also introduced.  Application of RNS to complicated problems such as exponentiation needed in RSA are also considered.

    About the speaker: Dr. Ananda Mohan is a specialist in the area of design and implementation of cryptographic systems for the Indian armed forces. He has designed several systems for securing the voice and data networks using proprietary algorithms which have been productionized at I.T.I. Limited as well Electronics Corporation of India Limited. He is areas of research interest are Analog VLSI design and Residue Number systems, VLSI architectures. He has contributed extensively in these areas and has published over seventy papers in refereed international journals. His book Switched Capacitor Filters: Theory, Analysis and Design coauthored with Dr. M. N. S. Swamy and Dr. V. Ramachandran was published by Prentice-Hall (London) in 1995. He has authored two more books Residue Number Systems: Algorithms and Architectures published in 2002 by Kluwer Academic Publishers and Current-mode VLSI analog Filters: Design and applications in 2003 by Birkhauser. He is a specialist in the art of analog filter design and has been actively pursuing research in this area as well and has taught at I.I.Sc Bangalore for the M.E. program topics on Mixed Signal design. He has received the Ram Lal Wadhwa Gold Medal Award from the Institution of Electronics and communication engineers (India) in 2003 and Indira Priyadarshini Award in 2004.  He has been elected a Fellow of IEEE in 2005 for “contributions to telecommunication technologies” and FNAE in 2008.


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