IEEE - CAS Bangalore Chapter, India     CAS Chapter - Region 10
Institute of Electrical and Electronics Engineers - Circuits and Systems Society
Goals: To conduct seminars, workshops, and other events pertaining to all aspects of electronic circuits and systems

Events - 2009
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Silicon based Vibrational Energy Harvesting using Electromagnetic Transduction
PragaTI (TI India Technical University) announces a seminar in cooperation with IEEE Circuits and Systems Bangalore Chapter
Speaker: Dr. Santosh Kulkarni, Tyndall National Institute, Ireland
Date: 5th November
Time: 4:00 pm to 5:00 pm
Venue: TI Bangalore Auditorium
This seminar is open to everyone. No formal registration is necessary, but please RSVP to B.M. Adithya -

Abstract: Over the years there has been a growing interest in the field of low power miniaturized wireless sensor networks. One specific topic that has received little attention is how to supply the required electrical power to such sensors. Conventional power supplies external to such sensors is one way. However, many applications do require such sensors to be completely embedded in the structure with no physical connection to the outside world. The ideal solution is for these sensors to have their own power supply unit making them self-powered sensor devices. New possibilities offered by micro batteries can make them independent from an external power supply; however the device lifetime still depends on its energy storage capacity. Recent studies on micro generators offer solution to this problem, adding to the wireless sensors the ability of recharging their energy storage by converting energy from the external environment to some form of useful electrical power. The aim of our work is the conception of a micro system containing all these elements, paving a promising and innovating road for future microelectronics applications. This work focuses upon the generation of electrical energy from mechanical vibrations and movements using electromagnetic transduction principle. The main goals of the project will be to use state of the art micro fabrication techniques to build millimeter scale micro power generators. In this presentation, I present the performance of assembled generators, semi and fully batch-fabricated generators.

Keywords: Energy Harvesting, Electromagnetic Transduction, Vibrational Energy, Low Power

An introduction to Vector Quantization - Part.1
PragaTI (TI India Technical University), in collaboration with the IEEE Circuits and Systems Society, Bangalore chapter, announces a Seminar
Speaker: Ganesan Thiararajan
Date: 21 October 2009
Time: 3.00 PM - 4.30 PM
Venue: TR-1, Texas Instruments India; Bagmane Tech Park, CV Raman Nagar, Bangalore 560093
There is no charge for the seminar. If you are from outside Texas Instruments India, please register by sending a note to B.M. Adithya ( before Oct 19th expressing your interest in attending. You must arrive at least 15 minutes before the event and carry a photo-ID with you. Please note that limited parking is available for visitors.

Target Audience: System engineers and software engineers with interest in communication and signal processing.
Audience Prerequisites: Basics of signal processing. We welcome faculty from colleges to register.

Abstract: Vector quantization is a lossy compression technique where source samples are quantized using a finite set of vectors referred as codebook vectors. This technique is widely used in speech and video/image compression. The fundamentals of source coding and the effect of quantization will be reviewed in the context of vector samples and analogy is drawn with scalar quantization. The popular LBG algorithm used for computing the optimum codebook is reviewed and an application in the context of digital filter design is given for illustrating the power of vector quantization.

About the speaker: Ganesan Thiagarajan
Designation: Algorithms & Systems Lead
Qualification: MS- Indian Institute of Science Bangalore
Professional Experience: 7 Years in Tl leading the WLAN Modem design team and Systems team. 15 years in total in Signal processing and Communication system design
Current interests: Broadband wireless systems, Coding theory

Predicting and Understanding the Behavior of Nanoscale Devices
PragaTI (TI India Technical University), in association with the VLSI Society of India and IEEE Circuits and Systems Society, Bangalore chapter, announces a Seminar
Speaker: Dr. Kurt Stokbro
Date: October 13, 2009
Time: 10.00 - 11.00 AM
Venue: TR-1, Texas Instruments India; Bagmane Tech Park, CV Raman Nagar, Bangalore 560093
Please arrive 15 minutes before the seminar. Limited visitor parking is available. You are required to carry some form of photo-identification with you to gain entry. Please RSVP to B.M. Adithya before Oct 12th (

Abstract: The talk addresses using ab initio and semi-empirical modeling to assist both theoreticians and experimentalists in predicting and understanding the behavior of nanoscale devices.
As the dimensions of electronic devices are rapidly decreasing, there is a need for a new generation of modeling tools that can accurately calculate the electrical properties of devices where atomic scale details and quantum effects are important. A promising framework for such calculations is the density functional theory within the nonequilibrium Green's function formalism (NEGF-DFT) [1,2]. In this presentation we present the basic framework and applications of the formalism. In addition, for the formalism to be applied in semiconductor device modeling it needs to be able to handle many thousands of atoms. We discuss new developments using Semi-Empirical method and future aspects [3] important for semiconductor device modeling; in particular we show that for important classes of systems the approach scales linearly with the system size. Insights gained when modeling the electrical properties of nanoscale devices will be illustrated through the results obtained for spin dependent devices, leakage current through ultra thin oxide barriers and carbon based electronics (carbon nanotubes/ graphene).

Dr. Kurt Stokbro: Summary of professional activities:

  • Entrepreneur and researcher with focus on atomic-scale simulations
  • Co-founder and CEO of Atomistix Aps, Atomistix Inc., QuantumWise A/S
  • Organizer of research projects with total USD 5 million in funding
  • Formerly a Professor with the Copenhagen University, Denmark
  • Recognized researcher with 58 publications in refereed journals, >1500 citations and 28 invited talks at international conferences.
  • Member of the scientific advisory board of IRC in Nanotechnology (University of Cambridge, University College London and the University of Bristol) and the scientific advisory board of Center for Atomic-scale Materials Design (CAMD), Technical University of Denmark.
  • Participation in the modeling section of the International Technology Roadmap for Semiconductors (ITRS);
  • Organizer of 3 conferences on atomic-scale simulations

  • September
    Biologically Inspired Computer Vision Algorithms
    In Cooperation with PragaTI (TI India Technical University), IEEE-CAS Bangalore Chapter announces a seminar
    Speaker: Dr. Jayanthi Sivaswamy, IIIT Hyderabad
    Date: September 1, 2009 (Tuesday)
    Time: 3.00 PM – 4.15 PM
    Venue: TR-1, Texas Instruments India, C.V.Raman Nagar, Bangalore
    Please RSVP to before 12.00 noon, Sep 1, 2009; and arrive before 2.45pm

    Abstract: In this seminar, we will discuss two of our recent works.

    1. Automatic identification of a script in a given document image facilitatesmany important applications such as automatic archiving of multilingual documents, searching online archives of document images and for the selection of script-specific OCR in a multi-lingual environment. In our work, we model script identification as a texture classification problem and examine a global approach inspired by human visual perception. A generalised, hierarchical framework is proposed for script identification. Aset of energy and intensity space features for this task is also presented. The framework serves to establish the utility of a global approach to the classification of scripts. The framework has been tested on two datasets: 10 Indian and 13 world scripts. The obtained accuracy of identification across the two datasets is above 94%. The results demonstrate that the framework can be used to develop solutions for script identification from document images across a large set of script classes.
    2. Many computer vision applications rely on the analysis of curvature within images. The use of hexagonal lattices can make this analysis easier. When coupled with the notion of attention driven search this can yield an efficient image analysis tool. As well, such systems are biologically plausible. Our model is based upon a hexagonal coordinate system that is hierarchical and efficient. The preliminary results are promising showing proficiency at the saccadic exploration task.

    About the speaker: Dr. Jayanthi Sivaswamy is a Professor at IIIT Hyderabad. She obtained her Ph.D. in 1992 from Syracuse University, USA. Before joining IIIT Hyderabad, she was a faculty in the University of Auckland, New Zealand, and IIT Delhi. She has authored a large number of papers in the areas of pattern recognition, image processing, biological and computer vision.
    She is the coauthor of the book Hexagonal Image Processing – A Practical Approach. Her areas of interest are - Computer and biological vision, Representations for object recognition, Medical image processing, and Signal Processing.

    13th IEEE/VSI VLSI Design And Test Symposium VDAT 2009
    Organized by VLSI Society of India, in co-operation with IEEE-CAS Bangalore Chapter
    Date: July 8-10, 2009
    Venue: Learning Center, Wipro Campus, Electronic City, Hosur Road, Bangalore
    Please visit the VDAT2009 website for more details. Discounted rates applicable to IEEE Members. Download Advance Program PDF

    Full-day tutorials on July 8, 2009:
    Tutorial – T1 Open Source Embedded System Development using Beagleboard by Syed Khasim (Texas Instruments India)
    Tutorial – T2 Compact Modeling and PDK's by Madabusi Govindarajan, Tamilmani Ethirajan, Abhisek Dixit, and Josef Watts (IBM)
    Tutorial – T3
    (Part 1): Test Cost Reduction Techniques, Current Practices, Challenges and Impact by Sarveswara Tammali (Texas Instruments India)
    (Part 2): Test Power Reduction Techniques: Current Practices, Challenges and Impact by C.P. Ravikumar and V.R. Devanathan (Texas Instruments)
    Tutorial – T4
    (Part 1): Telemedicine by Poornima Mohanachandran (i2iTeleSolutions)
    (Part 2): Assistive Devices for the Visually Impaired by M Balakrishnan* (IIT Delhi)

    Symposium during July 9-10, 2009:
    Technical paper presentations, 4 Keynote talks, Invited talks, Embedded tutorials, 2 Panel Discussions, and Research Scholar Forum.
    Note: Both the Tutorials and Symposium require separate registrations. Benefit discounted rates before June 22, 2009.

    DSP Week
    UniTI (TI India University Program) announces a hands - on training program, In cooperation with IEEE Circuits and Systems Society (Bangalore) and IEEE Signal Processing Society (Bangalore)
    Date: 29th June - 3rd July
    Time: 9:30 AM - 5:30 PM
    Venue: TI Bangalore Auditorium

    DSP WEEK is a modular five-day event designed for new and existing users of TI DSP products.
    Beginners can start with a hands-on training on Code Composer Studio. This is followed by a two-day workshop on Software Optimization on TI DSP, where a hands-on training on optimization techniques will be provided, focusing mainly on C6000 family of DSP and advanced platforms such as DM642 and DM644. Following this event is a (free) one-day workshop on Open-source Embedded System Development Platforms, where the participants will get a hands-on training on the Beagleboard. DSP-Week will end with a (free) seminar which will provide participants an insight into the TI DSP roadmap – hardware, software and applications.

    Participants may register for one or more of the events in DSP WEEK.
    Agenda ... Speakers ... Registration

    The Limits of Compression
    PragaTI (TI India Technical University) announces a seminar in collaboration with IEEE Circuits and Systems Bangalore Chapter IEEE Bangalore Section
    Speaker: Tom Williams, Synopsys Fellow
    Date: Jan 22, 2009
    Time: 11.00 AM – 12.30 PM
    Venue: Jack Kilby Auditorium, TI Bangalore Campus, C.V. Raman Nagar, Bangalore (near LRDE)
    There is no registration fee, but all nominations must be received by Jan 15, 2009. Send your nomination to Sri Hari Prasad ( Please indicate whether or not you are a member of IEEE or IEEE CAS. Confirmations will be sent by Jan 18th to all confirmed participants. Limited parking is available in front of the TI premises. If you are coming from outside TI, you must bring an organizational photo-ID. TI Security will check all the hand bags. Please arrive at least 20 minutes before the event. Thank you for your cooperation.

    Abstract: The use of scan-based compression techniques is becoming mandatory on current designs. Small delay fault testing is one of the fault targets which is a causing an expansion in the test data volume. This talk will follow the development of Synthesis and how it affects delay distribution. I will then show how this shift in delay distribution resulted in the need for small delay testing. While high compression is desired to hold the test costs within limits, it is important to understand what bounds exist that governs the ultimate compression that one can obtain with any technique. Next, arguments will be presented that will show that the network on chip determines the maximum compression obtainable, not the engineer or for that matter not the Test EDA salesperson.

    About the speaker: Dr. Thomas W. Williams is a Synopsys Fellow at Synopsys in Boulder, Colorado, U.S.A. Formerly, he was with IBM Microelectronics Division and manager of the VLSI Design for Testability group. He received a B.S.E.E. from Clarkson University, an M.A. in pure mathematics from the State University of New York at Binghamton, and a Ph.D. in electrical engineering from Colorado State University. He has received numerous best paper awards from the IEEE and ACM, is the founder or co-founder of a number of workshops and conferences dealing with testing, and was twice a Distinguished Visitor lecturer for the IEEE Computer Society.
    Dr. Williams has previously served on the Computer Society Board of Governors and the IEEE Board of Directors, and was the Society's 2000 Treasurer. He is a member of the Eta Kappa Nu, Tau Beta Pi, IEEE, ACM, Sigma Xi, and Phi Kappa Phi. He is an Adjunct Professor at the University of Calgary, Calgary, Alberta, Canada; and in 1985 and 1997, he was a Guest Professor and Robert Bosch Fellow at the Universitaet of Hannover, Hannover, Germany.
    Dr. Williams was named an IEEE Fellow in 1988 and received the Computer Society's W. Wallace McDowell Award for outstanding contributions to the computer art in 1989. He was named a member of the Chinese Academy of Science in 2007. In 2007 Dr. Williams received the European Design and Automation Association Lifetime Achievement Award for "outstanding contributions to the state of the art in electronic design, automation, and testing of electronic systems."

    Evolutionary Computation for Engineering Optimization
    PragaTI (TI India Technical University) , VSI & IEEE CAS, Bangalore Chapter jointly announce a seminar
    Speaker: C. Patvardhan, Professor, Department of Electrical Engineering, Dayalbagh Educational Institute, Agra
    Date: 16 January 2009
    Time: 3:00PM-4:30PM
    Venue: G-1, Texas Instruments India, Bagmane Techpark, C.V.Raman Nagar, Bangalore 560093
    The seminar is open to all VSI (VLSI Society of India) members and IEEE members. Contact if you wish to attend with details of your name, nationality, and organization. You must carry a photo-id and arrive at least 10 minutes before the start of the event to go through security.

    Abstract: Evolutionary Computing is a generic term for several stochastic search methods which computationally simulate the natural evolutionary process. Evolutionary Algorithms derive inspiration from the mechanism of Evolution in Nature. Evolutionary procedures are known to be robust optimization techniques, capable of effectively exploring very large parameter spaces. They perform well over a wide range of optimization problems. As a recognized research field EC is young, although its associated techniques have existed for about thirty years. EC embodies the techniques of Genetic Algorithms (GAs), Evolution strategies (ESs), and Evolutionary Programming (EP), collectively known as Evolutionary Algorithms (EAs). These EAs form one of the main components of Soft Computing (which provide approximate solution to a precisely / imprecisely formulated problem within reasonable amount of time).
    Quantum Computing is regarded by many as “the future paradigm of computing”. Quantum Evolutionary Algorithms are a recent development in Optimization research. These are the result of efforts aimed at utilizing ideas from Quantum Computing to develop more effective classical Evolutionary Algorithms. Preliminary results reported in the literature are exciting and augur well for the future while providing motivation for further research.
    The proposed talk is intended to provide an overview of Evolutionary Algorithms and Quantum Evolutionary Algorithms along with examples of engineering applications. Some work being done at the Dayalbagh Educational Institute, Agra in Evolutionary as well as Quantum Evolutionary Algorithms by the speaker and his associates is also highlighted.

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