IEEE - CAS Bangalore Chapter, India     CAS Chapter - Region 10
Institute of Electrical and Electronics Engineers - Circuits and Systems Society
Goals: To conduct seminars, workshops, and other events pertaining to all aspects of electronic circuits and systems

2nd Workshop on Interconnect Design and Variability
December 2007







Panel Discussion


December 13-14, 2007, Bangalore, India
Organized by: VLSI Society of India
Sponsors: Cadence Design Systems, and IEEE Circuits and Systems Society, Bangalore Chapter
Speakers: Juan C. Rey, Mentor Graphics Corporation; Srinivas Mandavilli, Mentor Graphics India; Kazuya Masu, Tokyo Institute of Technology; Ersed Ackasu, OEA International, Inc.; Noel Menezes, Intel Corporation; Sachin Sapatnekar, University of Minnesota; Tom Williams, Synopsys; Vish Sundararaman, Texas Instruments Inc., Dallas; Steffen Rochel, Blaze DFM Inc.,; Nishath Verghese and Atul Sharan, Cadence Design Systems; Nagaraj, N.S., Texas Instruments Inc., Dallas; Palkesh Jain and Gautam Kapila Texas Instruments India; Madhav P. Desai, IIT Bombay; Vani Prasad, Freescale Semiconductor; and Vidyasagar Ganesan, AMD


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